Hybrid 2D-CMOS microchips for memristive applications.

ABSTRACT: Exploiting the excellent electronic properties of two-dimensional (2D) materials to fabricate advanced electronic circuits is a major goal for the semiconductor industry^1,2. However, most studies in this field have been limited to the fabrication and characterization of isolated large (more than 1 µm²) devices on unfunctional SiO₂-Si substrates. Some studies have integrated monolayer graphene on silicon microchips as a large-area (more than 500 µm²) interconnection³ and as a channel of large transistors (roughly 16.5 µm²) (refs. ^4,5), but in all cases the integration density was low, no computation was demonstrated and manipulating monolayer 2D materials was challenging because native pinholes and cracks during tr

SUBMITTER: Zhu K 

PROVIDER: S-EPMC10232361 | biostudies-literature | 2023 Jun

REPOSITORIES: biostudies-literature