A Universal Implementation Approach for Multivalued Logic Gates Based on Negative Transconductance in Series-Connected Two-Dimensional Transistors.

ABSTRACT: Multiple-valued logic (MVL) is highly desired for algebra, logic, and artificial intelligence due to its higher information density. However, its practical adoption has been hindered for decades by extensive hardware requirements. Two-dimensional (2D) materials with exceptional electronic properties provide possibilities for the development of MVL devices with simple structures. Despite several reports on ternary logic (r = 3) hardware, extending their design to higher logic radix devices (r > 3) is challenging. The construction of elementary MVL gates with a higher radix is still relatively underexplored, and a universal device implementation approach is lacking. In this study, we exploit transconductance (g_m) matching between the negative transconductance

SUBMITTER: Zhao G 

PROVIDER: S-EPMC12269348 | biostudies-literature | 2025 Jul

REPOSITORIES: biostudies-literature