A Floating-Gate Photoelectric Synaptic Transistor Utilizing BP/PO_x/WSe₂ Heterostructure for Neuromorphic Visual Processing.

ABSTRACT: Artificial intelligence (AI) is constrained by the high energy consumption of von Neumann architectures and the limited scalability of traditional silicon-based synapses. Two-dimensional (2D) van der Waals (vdW) materials, with their atomic-scale thickness, tunable electronic properties, and ease of heterogeneous integration, offer a promising platform for next-generation neuromorphic hardware. Here, the authors report a vdW floating-gate transistor (BP/PO_x/WSe₂) with a high on-off current ratio (≈10⁵) and a large memory window (73 V), benefitting from the optimized interface band alignment via 2D heterostructure engineering. Key synaptic functionalities are demonstrated, including short-term plasticity (STP), long-term plasticity (LTP), and electro-optical

SUBMITTER: Zeng Y 

PROVIDER: S-EPMC12677613 | biostudies-literature | 2025 Dec

REPOSITORIES: biostudies-literature