A memristor-based energy-efficient compressed sensing accelerator with hardware-software co-optimization for edge computing.

ABSTRACT: Compressed sensing (CS), a revolutionary signal processing technique enabling sub-Nyquist sampling, has become integral to reduce hardware cost and energy consumption in diverse applications. However, with the exponential growth of data, traditional Si complementary metal-oxide semiconductor (CMOS)-based hardware implementations face significant challenges, including the von Neumann bottleneck in energy efficiency and computing latency. In this work, we propose a memristor-based CS accelerator (memCS) that leverages computing-in-memory (CIM) to eliminate the data movement overhead. Using a fully integrated 128 Kb memristor chip, we systematically analyze the impact of non-ideal device characteristics, and further propose a hardware-software co-optimization framework that integrates the mea

SUBMITTER: Jiao Y 

PROVIDER: S-EPMC12798729 | biostudies-literature | 2026 Jan

REPOSITORIES: biostudies-literature