Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range.

ABSTRACT: The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The par

SUBMITTER: Wang F 

PROVIDER: S-EPMC4829911 | biostudies-literature | 2016 Apr

REPOSITORIES: biostudies-literature