Top-down GaN nanowire transistors with nearly zero gate hysteresis for parallel vertical electronics.

ABSTRACT: This paper reports on the direct qualitative and quantitative performance comparisons of the field-effect transistors (FETs) based on vertical gallium nitride nanowires (GaN NWs) with different NW numbers (i.e., 1-100) and diameters (i.e., 220-640 nm) fabricated on the same wafer substrate to prove the feasibility of employing the vertical 3D architecture concept towards massively parallel electronic integration, particularly for logic circuitry and metrological applications. A top-down approach combining both inductively coupled plasma dry reactive ion etching (ICP-DRIE) and wet chemical etching is applied in the realization of vertically aligned GaN NWs on metalorganic vapor-phase epitaxy (MOVPE)-based GaN thin films with specific doping profiles. The FETs are fabricated involving a stac

SUBMITTER: Fatahilah MF 

PROVIDER: S-EPMC6635513 | biostudies-literature | 2019 Jul

REPOSITORIES: biostudies-literature