An FPGA-Based Ultra-High-Speed Object Detection Algorithm with Multi-Frame Information Fusion.

ABSTRACT: An ultra-high-speed algorithm based on Histogram of Oriented Gradient (HOG) and Support Vector Machine (SVM) for hardware implementation at 10,000 frames per second (FPS) under complex backgrounds is proposed for object detection. The algorithm is implemented on the field-programmable gate array (FPGA) in the high-speed-vision platform, in which 64 pixels are input per clock cycle. The high pixel parallelism of the vision platform limits its performance, as it is difficult to reduce the strides between detection windows below 16 pixels, thus introduce non-negligible deviation of object detection. In addition, limited by the transmission bandwidth, only one frame in every four frames can be transmitted to PC for post-processing, that is, 75% image information is wasted. To overcome the ment

SUBMITTER: Long X 

PROVIDER: S-EPMC6749355 | biostudies-literature | 2019 Aug

REPOSITORIES: biostudies-literature