Reconfigurable Architecture for Multi-lead ECG Signal Compression with High-frequency Noise Reduction.

ABSTRACT: Electrocardiogram (ECG) is a record of the heart's electrical activity over a specified period, and it is the most popular noninvasive diagnostic test to identify several cardiac diseases. It is an integral part of a typical eHealth system, where the ECG signals are often needed to be compressed for long term data recording and remote transmission. Reconfigurable architecture offers high-speed parallel computation unit, particularly the Field Programmable Gate Array (FPGA) along with adaptable software features. Hence, this type of design is suitable for multi-channel signal processing units like ECGs, which usually require precise real-time computation. This paper presents a reconfigurable signal processing unit which is implemented in ZedBoard- a development board for Xilinx Zynq -7000 S

SUBMITTER: Chowdhury MH 

PROVIDER: S-EPMC6872821 | biostudies-literature | 2019 Nov

REPOSITORIES: biostudies-literature