Fabrication of Graphoepitaxial Gate-All-Around Si Circuitry Patterned Nanowire Arrays Using Block Copolymer Assisted Hard Mask Approach.

ABSTRACT: We demonstrate the fabrication of sub-20 nm gate-all-around silicon (Si) nanowire field effect transistor structures using self-assembly. To create nanopatterned Si feature arrays, a block-copolymer-assisted hard mask approach was utilized using a topographically patterned substrate with well-defined Si₃N₄ features for graphoepitaxially alignment of the self-assembled patterns. Microphase-separated long-range ordered polystyrene-b-poly(ethylene oxide) (PS-b-PEO) block-copolymer-derived dot and line nanopatterns were achieved by a thermo-solvent approach within the substrate topographically defined channels of various widths and lengths. Solvent annealing parameters (temperature, annealing time, etc.) were varied to achieve the desired patterns. Th

SUBMITTER: Ghoshal T 

PROVIDER: S-EPMC8291765 | biostudies-literature | 2021 Jun

REPOSITORIES: biostudies-literature