Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors.

ABSTRACT: Multi-valued logic (MVL) circuits based on heterojunction transistor (HTR) have emerged as an effective strategy for high-density information processing without increasing the circuit complexity. Herein, an organic ternary logic inverter (T-inverter) is demonstrated, where a nonvolatile floating-gate flash memory is employed to control the channel conductance systematically, thus realizing the stabilized T-inverter operation. The 3-dimensional (3D) T-inverter is fabricated in a vertically stacked form based on all-dry processes, which enables the high-density integration with high device uniformity. In the flash memory, ultrathin polymer dielectrics are utilized to reduce the programming/erasing voltage as well as operating voltage. With the optimum programming state, the 3D T-inverter ful

SUBMITTER: Choi J 

PROVIDER: S-EPMC9051064 | biostudies-literature | 2022 Apr

REPOSITORIES: biostudies-literature