Project description:Organic cocrystals, which are assembled by noncovalent intermolecular interactions, have garnered intense interest due to their remarkable chemicophysical properties and practical applications. One notable feature, namely, the charge transfer (CT) interactions within the cocrystals, not only facilitates the formation of an ordered supramolecular network but also endows them with desirable semiconductor characteristics. Here, we present the intriguing ambipolar CT properties exhibited by nanosheets composed of single cocrystals of C70/ferrocene (C70/Fc). When heated to 150 °C, the initially ambipolar monoclinic C70/Fc nanosheet-based field-effect transistors (FETs) were transformed into n-type face-centered cubic (fcc) C70 nanosheet-based FETs owing to the elimination of Fc. This thermally induced alteration in the crystal structure was accompanied by an irreversible switching of the semiconducting behavior of the device; thus, the device transitions from ambipolar to unipolar. Importantly, the C70/Fc nanosheet-based FETs were also found to be much more thermally stable than the previously reported C60/Fc nanosheet-based FETs. Furthermore, we conducted visible/near-infrared diffuse reflectance and photoemission yield spectroscopies to investigate the crucial role played by Fc in modulating the CT characteristics. This study provides valuable insights into the overall functionality of these nanosheet structures.
Project description:Steep-slope β-Ga2O3 nanomembrane negative capacitance field-effect transistors (NC-FETs) are demonstrated with ferroelectric hafnium zirconium oxide in the gate dielectric stack. Subthreshold slope less than 60 mV/dec at room temperature is obtained for both forward and reverse gate-voltage sweeps with a minimum value of 34.3 mV/dec at the reverse gate-voltage sweep and 53.1 mV/dec at the forward gate-voltage sweep at V DS = 0.5 V. Enhancement-mode operation with a threshold voltage of ∼0.4 V is achieved by tuning the thickness of the β-Ga2O3 membrane. Low hysteresis of less than 0.1 V is obtained. The steep-slope, low hysteresis, and enhancement-mode β-Ga2O3 NC-FETs are promising as an nFET candidate for future wide band gap complementary metal-oxide-semiconductor logic applications.
Project description:Optical data sensing, processing and visual memory are fundamental requirements for artificial intelligence and robotics with autonomous navigation. Traditionally, imaging has been kept separate from the pattern recognition circuitry. Optoelectronic synapses hold the special potential of integrating these two fields into a single layer, where a single device can record optical data, convert it into a conductance state and store it for learning and pattern recognition, similar to the optic nerve in human eye. In this work, the trapping and de-trapping of photogenerated carriers in the MoS2/SiO2 interface of a n-channel MoS2 transistor was employed to emulate the optoelectronic synapse characteristics. The monolayer MoS2 field effect transistor (FET) exhibits photo-induced short-term and long-term potentiation, electrically driven long-term depression, paired pulse facilitation (PPF), spike time dependent plasticity, which are necessary synaptic characteristics. Moreover, the device's ability to retain its conductance state can be modulated by the gate voltage, making the device behave as a photodetector for positive gate voltages and an optoelectronic synapse at negative gate voltages.
Project description:Two-dimensional (2D) semiconductors, such as transition metal dichalcogenides (TMDs) and black phosphorus, are the most promising channel materials for future electronics because of their unique electrical properties. Even though a number of 2D-materials-based logic devices have been demonstrated to date, most of them are a combination of more than two unit devices. If logic devices can be realized in a single channel, it would be advantageous for higher integration and functionality. In this study we report high-performance van der Waals heterostructure (vdW) ReS2 transistors with graphene electrodes on atomically flat hBN, and demonstrate a NAND gate comprising a single ReS2 transistor with split gates. Highly sensitive electrostatic doping of ReS2 enables fabrication of gate-tunable NAND logic gates, which cannot be achieved in bulk semiconductor materials because of the absence of gate tunability. The vdW heterostructure NAND gate comprising a single transistor paves a novel way to realize "all-2D" circuitry for flexible and transparent electronic applications.
Project description:The impact of the intrinsic time-dependent fluctuations in the electrical resistance at the graphene-metal interface or the contact noise, on the performance of graphene field-effect transistors, can be as adverse as the contact resistance itself, but remains largely unexplored. Here we have investigated the contact noise in graphene field-effect transistors of varying device geometry and contact configuration, with carrier mobility ranging from 5,000 to 80,000 cm2 V-1 s-1. Our phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four-probe configurations, and surprisingly, also in nearly noninvasive four-probe (Hall bar) configuration in the high-mobility devices. The microscopic origin of contact noise is directly linked to the fluctuating electrostatic environment of the metal-channel interface, which could be generic to two-dimensional material-based electronic devices.
Project description:Here we report the ZrOx-based negative capacitance (NC) FETs with 45.06 mV/decade subthreshold swing (SS) under ± 1 V VGS range, which can achieve new opportunities in future voltage-scalable NCFET applications. The ferroelectric-like behavior of the Ge/ZrOx/TaN capacitors is proposed to be originated from the oxygen vacancy dipoles. The NC effect of the amorphous HfO2 and ZrOx films devices can be proved by the sudden drop of gate leakage, the negative differential resistance (NDR) phenomenon, the enhancement of IDS and sub-60 subthreshold swing. 5 nm ZrOx-based NCFETs achieve a clockwise hysteresis of 0.24 V, lower than 60 mV/decade SS and an 12% IDS enhancement compared to the control device without ZrOx. The suppressed NC effect of Al2O3/HfO2 NCFET compared with ZrOx NCFET is related to the partial switching of oxygen vacancy dipoles in the forward sweeping due to negative interfacial dipoles at the Al2O3/HfO2 interface.
Project description:Atomically thin semiconductors are of interest for future electronics applications, and much attention has been given to monolayer (1L) sulfides, such as MoS2, grown by chemical vapor deposition (CVD). However, reports on the electrical properties of CVD-grown selenides, and MoSe2 in particular, are scarce. Here, we compare the electrical properties of 1L and bilayer (2L) MoSe2 grown by CVD and capped by sub-stoichiometric AlOx. The 2L channels exhibit ∼20× lower contact resistance (RC) and ∼30× larger current density compared with 1L channels. RC is further reduced by >5× with AlOx capping, which enables improved transistor current density. Overall, 2L AlOx-capped MoSe2 transistors (with ∼500 nm channel length) achieve improved current density (∼65 μA/μm at VDS = 4 V), a good Ion/Ioff ratio of >106, and an RC of ∼60 kΩ·μm. The weaker performance of 1L devices is due to their sensitivity to processing and ambient. Our results suggest that 2L (or few layers) is preferable to 1L for improved electronic properties in applications that do not require a direct band gap, which is a key finding for future two-dimensional electronics.
Project description:Here we benchmark device-to-device variation in field-effect transistors (FETs) based on monolayer MoS2 and WS2 films grown using metal-organic chemical vapor deposition process. Our study involves 230 MoS2 FETs and 160 WS2 FETs with channel lengths ranging from 5 μm down to 100 nm. We use statistical measures to evaluate key FET performance indicators for benchmarking these two-dimensional (2D) transition metal dichalcogenide (TMD) monolayers against existing literature as well as ultra-thin body Si FETs. Our results show consistent performance of 2D FETs across 1 × 1 cm2 chips owing to high quality and uniform growth of these TMDs followed by clean transfer onto device substrates. We are able to demonstrate record high carrier mobility of 33 cm2 V-1 s-1 in WS2 FETs, which is a 1.5X improvement compared to the best reported in the literature. Our experimental demonstrations confirm the technological viability of 2D FETs in future integrated circuits.
Project description:Carrier multiplication via impact ionization in two-dimensional (2D) layered materials is a very promising process for manufacturing high-performance devices because the multiplication has been reported to overcome thermodynamic conversion limits. Given that 2D layered materials exhibit highly anisotropic transport properties, understanding the directionally-dependent multiplication process is necessary for device applications. In this study, the anisotropy of carrier multiplication in the 2D layered material, WSe2, is investigated. To study the multiplication anisotropy of WSe2, both lateral and vertical WSe2 field effect transistors (FETs) are fabricated and their electrical and transport properties are investigated. We find that the multiplication anisotropy is much bigger than the transport anisotropy, i.e., the critical electric field (ECR) for impact ionization of vertical WSe2 FETs is approximately ten times higher than that of lateral FETs. To understand the experimental results we calculate the average energy of the carriers in the proposed devices under strong electric fields by using the Monte Carlo simulation method. The calculated average energy is strongly dependent on the transport directions and we find that the critical electric field for impact ionization in vertical devices is approximately one order of magnitude larger than that of the lateral devices, consistent with experimental results. Our findings provide new strategies for the future development of low-power electric and photoelectric devices.
Project description:A simple way to prepare field-effect transistors (FETs) using MoS2 on tabletop is presented. Conductive silver paste was applied onto chemical vapor deposition (CVD)-grown MoS2 as Ohmic-contact electrodes. Heating the device in vacuum further enhances the performance without damage. The final performance is comparable to that of the SiO2-backgated devices prepared by lithography and metal evaporators. The role of the silver paste and heat treatment in vacuum is investigated by device and spectroscopic analysis.